Help me ! input impedance of field effect transistor

[mattmro444]

Hi there,

Why input impedance of field effect transistor is high ?


mrosupply

[Justloadit]

What you trying to do?

FET, Field Effect Transistor with an insulated gate technology.

The insulated gate technology is such that a thin oxide layer is sandwiched between the silicon gate and the substrate or bulk, thus created a MOS capacitor which gives high impedance only in DC and low frequency.

High impedance doesn't hold at frequencies above the maximum frequency Ft of the FET.

You want a high impedance when it is off and a very low impedance when it is on.
When in the off state, you want no current flow at all to not affect the driving circuit or the load circuit, when the FET is On, you want a very low impedance, so that there is no losses generated across the junction, so no heat generated. Any volt drop across the junction will cause a loss and according to Ohms law, Power/Loss = Current squared times the "On'' Resistance and reduces the efficiency of your circuit.

See here for more help

[AndyD]

Depending on the application high input impedance is often desirable.